JTAG pinout for E1000 V2

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mes3
DD-WRT Novice


Joined: 30 Oct 2012
Posts: 4

PostPosted: Wed Jan 02, 2013 9:59    Post subject: JTAG pinout for E1000 V2 Reply with quote
Hi all,

I have a hard bricked E1000 V2 and the following two questions:

1) Is the 2x6 pin micro JTAG connector on the board connected to the CPU (I read that for V1 it isn't)?
2) What is the JTAG pin layout for this connector?

Many thanks!

MES
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Murrkf
DD-WRT Guru


Joined: 22 Sep 2008
Posts: 12675

PostPosted: Wed Jan 02, 2013 15:15    Post subject: Reply with quote
You should be able to debrick it with a serial cable, rather than jtag. See the wiki on serial recovery.
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mes3
DD-WRT Novice


Joined: 30 Oct 2012
Posts: 4

PostPosted: Sat Jan 12, 2013 15:39    Post subject: Reply with quote
Not sure about that. I tried with a serial cable but I cannot get the router to accept any commands. It is stuck and there is no output. All LEDs are immediately lit at the same time and there is no change (blinking, etc.) after power on. The LAN interface does not have an IP address assigned. Normally I can stop the boot with ctrl-c and assign IP addresses or upload images on the serial console. That is not working on this router. So I assume that the boot config is stuck. If you know how to fix that without a JTAG I would appreciate any hints. The usual 30/30/30 NVRAM clearing methods did not work.

In the meantime I found the pinout, it is the same for all hardware versions:

E1000 - DB25 (unbuffered cable with 100 Ohm resistors in the line)

Pin 1: nTRST - NC
Pin 3: TDI - D0 (2)
Pin 5: TDO - Select (13)
Pin 7: TMS - D2 (4)
Pin 9: TCK - D1 (3)
Pin 11: nSRST - NC
even pins: GND

TCK – 'test clock' synchronizes the internal state machine operations
TMS – 'test mode select' is sampled at the rising edge of TCK to determine the next state.
TDI – 'test data in' represents the data shifted into the device's test or programming logic.
TDO – 'test data out' represents the data shifted out of the device's test or programming logic
TRST –'test reset' resets the TAP controller's state machine.
SRST - 'system reset' that acts like conventional "Reset' button

nTRST/nSRST active level is "0" (the first "n" indicates negative logic). Do not need to be connected.


Best regards!
mes3
DD-WRT Novice


Joined: 30 Oct 2012
Posts: 4

PostPosted: Sun Jan 20, 2013 14:05    Post subject: Reply with quote
I just wanted to share my debugging results. Short message is, the router is up and running again. Long story is that I had to clear the NVRAM with a JTAG cable. Then the router booted into CFE again and I could access the serial interface. From this point it was easy to put the stock firmware with tftp and flash it.

The JTAG cable was not so easy to make, because the Linksys E1000 V2 only has an unsoldered 12 pin micro connector on the PCB. I used a 2x10 micro (1.27mm spacing) pin strip, cut it to 2x6 and soldered it to the PCB. The corresponding 2x10 micro receptacle (female) strip could not be cut, but fits anyway with some unused pins on the side. I soldered a 1.27mm ribbon cable to the micro receptacle and standard female (2.54mm) 1x1 headers onto the other side (cut from a longer strip). Soldering the micro strip to the cable is a bit annoying if you do not have a magnifying glass or very good eyes. I really would have appreciated a micro to standard header converter, but I do not know if such a converter even exists. The 1x1 female headers can be connected to any parallel interface adapter, I prefer this over soldering the cable direcly to a DB25 connector, because it gives you more flexibility to change the pin layout.

In my case I used an universal parallel port JTAG adapter from TIAO I got from DIYGADGET, here you can simply plug in any self made JTAG cable as needed. Costs only 13$ and also offers to use a buffered JTAG interface (Wiggler cable). The unbuffered cable should be as short as possible, below 20 cm is ideal for an unbuffered interface. For me a 20 cm cable was not very practial so I made a 40 cm cable and used it in buffered mode.

After the interface cable is ready the rest is quite straight forwared, there is a lot of good documentation on how to debrick broadcam based devices with the tjtag/ejtag tool. Some of my pain points that may be interesting to share:
- make sure that you have a parallel port on your computer that is actually enabled (on my computer it was deactivated in the BIOS - set it to EPP mode)
- if you use a buffered cable you need to tell the jtag utility to switch to wiggler mode or it will simply fail to detect the chip without any errors
- If the jtag utility detects a chip (ID is not 0), but cannot recognize it, then your jtag tool is too old.
- If you do not have the reset lines connected you need to power on the device and start the jtag utility immediately after that. If you wait too long the JTAG port on the chip may be blocked.

Hope that helps!

BR
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