Fonera 2.0n 2303 u-boot flash attemp

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pohan
DD-WRT Novice


Joined: 04 Mar 2016
Posts: 4

PostPosted: Sun Mar 06, 2016 1:58    Post subject: Fonera 2.0n 2303 u-boot flash attemp Reply with quote
Hi all.
This is my first post.
I try to find info about debricking Fonera 2.0n (2303)
https://wiki.openwrt.org/toh/hwdata/fon/fon_fonera20n_fon2303a
Below is My Progress:
1. I have found Jtag Pinout(spend almost 2 day's find it)
serial:
[3.3V ;To Tx; GND ;To Rx ]
*) Serial is not connected to the jumper at default, please check link below:
http://www.flanesi.it/blog/2011/04/17/fonera-2-0n-hardware-e-potenzialita/

JTAG:
[GND ; TDO ; TMS ; TCK ; TDI ; TRST_n* ]
[V3.3 ; SPI_DIN** ; SPI_DO** ; SPI_CLK** ; SPI_EN** ; GND ]
* I_havent check the SPI connection
*)TRST_n* is pulled down , so if you only have 4 wire JTAG, it should connected to Vcc

this side is antenna side

2. I use OpenOCD
http://openocd.org/getting-openocd/

and FT2232 JTAG progrramer from Lattice MACHXO2 development board

http://www.latticesemi.com/Products/DevelopmentBoardsAndKits/MachXO2BreakoutBoard.aspx
* remove the TDO and TDI drom Lattice Target and using it as JTAG adapter

3. I use the modified RT3052.cfg file from user: "dulluj"
http://www.dd-wrt.com/phpBB2/viewtopic.php?t=277076&postdays=0&postorder=asc&start=15

4. Have test two u-boot.bin from 2 source and didn't work

5. Have try program and dump the Flash content so the programming is ok(maybe)

at next post i will include the debug log...

Is anybody have working u-Boot.bin, since I'm never compiled u-boot before?
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pohan
DD-WRT Novice


Joined: 04 Mar 2016
Posts: 4

PostPosted: Sun Mar 06, 2016 2:33    Post subject: Reply with quote
Modified RT3052.cfg below, Log and uboot binary(NOT WORKING FOR FONERA 2.0N /2303) attached

set _CHIPNAME rt3052
set _ENDIAN little
set _CPUTAPID 0x1305224F

#daemon configuration
telnet_port 4444
gdb_port 3333

#interface
interface ft2232
ft2232_device_desc "Lattice FTUSB Interface Cable A"
ft2232_layout olimex-jtag
#ft2232_vid_pid 0x0403 0x6010


#jtag_speed
adapter_khz 500

adapter_nsrst_delay 100
jtag_ntrst_delay 100
echo on
# jtag scan chain
# format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x3 -expected-id $_CPUTAPID

set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME

# flash size will be probed
set _FLASHNAME $_CHIPNAME.flash
# format flash bank name driver base size chip_width bus_width target
flash bank $_FLASHNAME cfi 0xBF000000 8388608 2 2 $_TARGETNAME

#flash bank $_FLASHNAME cfi 0x0 8388608 2 2 $_TARGETNAME

echo "allocating work area"
$_TARGETNAME configure -work-area-phys 0x80040000 -work-area-size 4096

echo "allocation complete"
#Folloing code may not work, in that case you need to manually reset init
#and manually load your u-boot.bin at starting address (0x0) of flash (not RAM).
#starting Address of flash can be found in old dump of serial console or at ddwrt forum/openwrt forum
$_TARGETNAME configure -event reset-init {
#reset
echo "halting the target!!!!!!!!!!!!!!!!!!!!!!!!!!!"
halt
echo "init SDRAM controller..........................@@@@@@@@@@@@@@@@@@@@"
mww 0x10000300 0xd1825272
mww 0x10000304 0xe0120300
echo "Find flash..."
flash probe 0
echo "Load u-boot .."
load_image uboot.bin 0x80000000 bin
# resume 0x80000000
}
pohan
DD-WRT Novice


Joined: 04 Mar 2016
Posts: 4

PostPosted: Sun Mar 13, 2016 4:03    Post subject: Reply with quote
Finally i success loading uboot;
working uboot.bin attached(not guaranteed to work)
The openocd v 0.9.0 is have register "a" bug
i use the openocd 0.8.0 and success.

config file:
RT3052.cfg
set _CHIPNAME rt3052
set _ENDIAN little
set _CPUTAPID 0x1305224F

#daemon configuration
telnet_port 23
gdb_port 3333

#interface
interface ft2232
ft2232_device_desc "Lattice FTUSB Interface Cable A"
ft2232_layout olimex-jtag
#ft2232_vid_pid 0x0403 0x6010


#jtag_speed
adapter_khz 500

adapter_nsrst_delay 100
jtag_ntrst_delay 100
echo on
# jtag scan chain
# format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x3 -expected-id $_CPUTAPID

set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME

# flash size will be probed
set _FLASHNAME $_CHIPNAME.flash
# format flash bank name driver base size chip_width bus_width target
flash bank $_FLASHNAME cfi 0xBF000000 8388608 2 2 $_TARGETNAME

# flash bank $_FLASHNAME cfi 0x0 8388608 2 2 $_TARGETNAME

echo "allocating work area"
$_TARGETNAME configure -work-area-phys 0x80040000 -work-area-size 4096

echo "allocation complete"
#Folloing code may not work, in that case you need to manually reset init
#and manually load your u-boot.bin at starting address (0x0) of flash (not RAM).
#starting Address of flash can be found in old dump of serial console or at ddwrt forum/openwrt forum
$_TARGETNAME configure -event reset-init {
#reset
echo "halting the target!!!!!!!!!!!!!!!!!!!!!!!!!!!"
halt
echo "init SDRAM controller..........................@@@@@@@@@@@@@@@@@@@@"
mww 0x10000300 0xd1825272
mww 0x10000304 0xe0120300
mww 0x1000030c 0x0511ffa1

echo "Find flash..."
flash probe 0
echo "Load u-boot to RAM.."
load_image uboot.bin 0x80000000 bin
echo "Load u-boot to FLASH .."

flash protect 0 0 10 off
flash erase_sector 0 0 10
flash write_bank 0 uboot.bin 0x0


# resume 0x80000000
}
kalauz
DD-WRT Novice


Joined: 31 May 2016
Posts: 2

PostPosted: Tue May 31, 2016 10:38    Post subject: JTAG Fonera 2303 Reply with quote
Hello, good job!! I have a bricked fonera 2303 too.
I build a xilinx dcl5 unbuffered cable lpt , like this

https://wiki.openwrt.org/doc/hardware/port.jtag.cable.unbuffered

I found the uboot.bin registering on this forum Rolling Eyes .

I tryed hooking up the jtag to the lpt port, but no luck for now.
I wired the TRST to the VCC of the header directly , is it correct?
I notice that if I remove the TRST-VCC joint the jtag dont seems to be recognized.(I tryed to put a 100ohm resistor between and the result is the same).
I used your rt3052.cfg file changing only the interface section as the dulluj user did (he was using a cable like mine I suppose).

This is my openocd rt3052.cfg file:
Code:

#RT3052.cfg
set _CHIPNAME rt3052
set _ENDIAN little
set _CPUTAPID 0x1305224F

#daemon configuration
telnet_port 23
gdb_port 3333

#interface
#interface ft2232
#ft2232_device_desc "Lattice FTUSB Interface Cable A"
#ft2232_layout olimex-jtag
#ft2232_vid_pid 0x0403 0x6010


## inizio mod cavo xilinx dlc5

if { [info exists PARPORTADDR] } {
   set _PARPORTADDR $PARPORTADDR
} else {
   set _PARPORTADDR 0
}

interface parport
parport_port $_PARPORTADDR   #originale
parport_cable dlc5

## fine mod


#jtag_speed
adapter_khz 500
#adapter_khz 100

adapter_nsrst_delay 100
jtag_ntrst_delay 100
echo on
# jtag scan chain
# format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x3 -expected-id $_CPUTAPID

set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME

# flash size will be probed
set _FLASHNAME $_CHIPNAME.flash
# format flash bank name driver base size chip_width bus_width target
flash bank $_FLASHNAME cfi 0xBF000000 8388608 2 2 $_TARGETNAME

# flash bank $_FLASHNAME cfi 0x0 8388608 2 2 $_TARGETNAME

echo "indirizzo parport "$_PARPORTADDR

echo "allocating work area"
$_TARGETNAME configure -work-area-phys 0x80040000 -work-area-size 4096

echo "allocation complete"
#Folloing code may not work, in that case you need to manually reset init
#and manually load your u-boot.bin at starting address (0x0) of flash (not RAM).
#starting Address of flash can be found in old dump of serial console or at ddwrt forum/openwrt forum
$_TARGETNAME configure -event reset-init {
#reset
echo "halting the target!!!!!!!!!!!!!!!!!!!!!!!!!!!"
halt
echo "init SDRAM controller..........................@@@@@@@@@@@@@@@@@@@@"
mww 0x10000300 0xd1825272
mww 0x10000304 0xe0120300
mww 0x1000030c 0x0511ffa1

echo "Find flash..."
flash probe 0
echo "Load u-boot to RAM.."
load_image uboot.bin 0x80000000 bin
echo "Load u-boot to FLASH .."

flash protect 0 0 10 off
flash erase_sector 0 0 10
flash write_bank 0 uboot.bin 0x0


# resume 0x80000000
}




I issued this command:
Code:

openocd -f new_rt3052.cfg -c "gdb_memory_map enable" -c "gdb_flash_program enable"

The execution stops at "allocation complete" and don't go on , it hangs there with no errors.
I can reach the openocd telnet at the chosen port (23 in my rt3052.cfg file) but issuing a
Code:

flash probe 0

it give me that error.
Code:

Target not halted
auto_probe failed
in procedure 'flash'


I m not really confident that the cable is working, how could I check it ? (some openocd commands)

Another thing, could you please share some commands for openocd flashing.


Thank you very much.
pohan
DD-WRT Novice


Joined: 04 Mar 2016
Posts: 4

PostPosted: Sat Jun 04, 2016 3:13    Post subject: Reply with quote
Hi,kalauz

I'm not an expert on OpenOCD, but i have suggestion that may help.

Try to do step by step programming procedure again on telnet like halt the processor (so the JTAG can work), flash probe,....
So the config file only used for JTAG & cable initialization , and last time i try the programming step manual in telnet, and try some command from command list to access and trouble shoot too
kalauz
DD-WRT Novice


Joined: 31 May 2016
Posts: 2

PostPosted: Sat Jun 04, 2016 12:21    Post subject: Reply with quote
Thank you for your reply, one question about wiring , in your setup did you hooked trst to vcc directly ?
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